general description the MAX3841 is a low-power, 12.5gbps 2 2 cross- point switch ic for high-speed serial data loopback, redundancy, and switching applications. the MAX3841 current-mode logic (cml) inputs and outputs have iso- lated v cc connections to enable dc-coupled interfaces to 1.8v, 2.5v, or 3.3v cml ics. fully differential signal paths and maxim? second-generation sige technology provide optimum signal integrity, minimizing jitter, crosstalk, and signal skew. the MAX3841 is ideal for serial oc-192 and 10gbe optical module, line card, switch fabric, and similar applications. the MAX3841 has 150mv p-p minimum differential input sensitivity, and 500mv p-p nominal differential output swing. unused outputs can be powered down individu- ally to conserve power. in addition to functioning as a 2 2 switch, the MAX3841 can be configured as a 2:1 multiplexer, 1:2 buffer, or dual 1:1 buffer. the MAX3841 is available in a 4mm 4mm 24-pin thin qfn package, and consumes only 215mw with both outputs enabled. applications oc-192, 10gbe switch/line cards oc-192, 10gbe optical modules system redundancy/self test clock fanout features up to 12.5gbps operation less than 10ps p-p deterministic jitter less than 0.7ps rms random jitter 1.8v, 2.5v, and 3.3v dc-coupled cml i/o independent output power-down 4mm 4mm thin qfn package -40? to +85? operation +3.3v core supply 215mw power consumption (excluding termination currents) MAX3841 12.5gbps cml 2 2 crosspoint switch ________________________________________________________________ maxim integrated products 1 ordering information MAX3841 10gbps serial optical module sdi+ sdi- sdo+ sdo- out1+ out1- in1+ in1- sel1 sel2 eno1 eno2 loopback 3.3v v cc vcc1out vcc1in 2.5v 2.5v 2.5v in2+ in2- out2+ out2- sdo+ sdo- sdi+ sdi- vcc2in vcc2out 1.8v 1.8v gnd 10gbps cdr/serdes asic 3.3v 1.8v typical application circuit 19-2905; rev 0; 8/03 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin- package pkg. code MAX3841etg -40 c to +85 c 24 thin qfn t2444-1 pin configuration appears at end of data sheet.
MAX3841 12.5gbps cml 2 2 crosspoint switch 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +3.0v to +3.6v, vcc_in = +1.71v to v cc , vcc_out = +1.71v to v cc , t a = -40 c to +85 c. typical values are at v cc = +3.3v, vcc_in = vcc_out = 1.8v, t a = +25 c, unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: guaranteed by design and characterization. note 2: differential swing is defined as v in = (in_+) - (in_-) and v out = (out_+) - (out_-). see figure 1. note 3: measured using a 0000011111 pattern at 12.5gbps, and v in = 400mv p-p differential. note 4: measured at 9.953gbps using a pattern of 100 ones, 2 7 - 1 prbs, 100 zeros, 2 7 - 1 prbs, and at 12.5gbps using a k28.5 pattern. vcc_in = vcc_out = 1.8v, and v in = 400mv p-p differential. note 5: refer to maxim application note hfan-04.5.1: measuring random jitter on a digital sampling oscilloscope . supply voltage, v cc ..............................................-0.5v to +4.0v cml supply voltage (vcc_in, vcc_out)...........-0.5v to +4.0v continuous output current (out1 , out2 )................... 25ma cml input voltage (in1 , in2 )...........-0.5v to (vcc_in + 0.5v) lvcmos input voltage (sel1, sel2, eno1, eno2) .........................................-0.5v to (v cc + 0.5v) continuous power dissipation (t a = +85 c) 24-pin thin qfn (derate 20.8mw/ c above +85 c).............................................................1352mw operating temperature range ...........................-40 c to +85 c storage temperature range .............................-55 c to +150 c lead temperature (soldering, 10s) .................................+300 c parameter sym b o l conditions min typ max units core supply current i cc excluding cml termination currents 65 90 ma data rate (note 1) 0 12.5 gbps cml input differential v in ac-coupled or dc-coupled (note 2) 150 1200 mv p-p cml input common mode dc-coupled vcc_in - 0.3 vcc_in v cml input termination single ended 42.5 50 57.5 ? cml input return loss up to 10ghz 12 db cml output differential v out (note 2) 400 500 600 mv p-p cml output termination single ended 42.5 50 57.5 ? cml output transition time t r , t f 20% to 80% (notes 1, 3) 30 ps deterministic jitter (notes 1, 4) 10 ps p-p random jitter v in = 150mv p-p (notes 1, 5) 0.3 0.7 ps rms propagation delay any input to output (note 1) 100 140 ps channel-to-channel skew (note 1) 12 ps output duty-cycle skew 50% input duty cycle (notes 1, 3) 8 ps lvcmos input current i ih , i il -10 +10 a lvcmos input high voltage v ih 1.7 v
MAX3841 12.5gbps cml 2 2 crosspoint switch _______________________________________________________________________________________ 3 core supply current vs. temperature (excludes cml i/o currents) MAX3841 toc01 temperature ( c) supply current (ma) 60 35 10 -15 50 60 70 80 90 100 110 120 130 140 40 -40 85 0 outputs enable 2 outputs enable 1 output enable supply current vs. temperature (core plus cml i/o currents) MAX3841 toc02 temperature ( c) supply current (ma) 60 35 10 -15 50 60 70 80 90 100 110 120 130 140 40 -40 85 0 outputs enable 2 outputs enable 1 output enable cml inputs and outputs ac-coupled output eye diagram (12.5gbps, 2 23 - 1 prbs) MAX3841 toc03 14ps/div 60mv/div output eye diagram (10.7gbps, 2 23 - 1 prbs) MAX3841 toc04 16ps/div 60mv/div output eye diagram (6.25gbps, 2 23 - 1 prbs) MAX3841 toc05 28ps/div 60mv/div output eye diagram (622mbps, 2 23 - 1 prbs) MAX3841 toc06 270ps/div 60mv/div deterministic jitter vs. temperature MAX3841 toc07 temperature ( c) deterministic jitter (ps) 60 35 -15 10 2 4 6 8 10 12 14 16 0 -40 85 2 7 - 1 prbs + 100cids at 10.7gbps k28.5 at 12.5gbps differential output swing vs. temperature MAX3841 toc08 temperature ( c) differential output (mv p-p ) 60 35 10 -15 460 470 480 490 500 510 520 530 540 550 450 -40 85 propagation delay MAX3841 toc09 100ps/div out1 in1 typical operating characteristics (v cc = 3.3v, vcc_in, vcc_out = 1.8v, v in = 500mv p-p , t a = +25 c, unless otherwise noted.)
MAX3841 12.5gbps cml 2 2 crosspoint switch 4 _______________________________________________________________________________________ pin description pin name function 1, 12 v cc +3.3v core supply voltage 2, 5 vcc1in supply voltage for cml input in1. connect to 1.8v, 2.5v, or 3.3v. 3 in1+ positive serial data input 1, cml 4 in1- negative serial data input 1, cml 6 sel1 output 1 select, lvcmos input. see table 1. 7 sel2 output 2 select, lvcmos input. see table 1. 8, 11 vcc2in supply voltage for cml input in2. connect to 1.8v, 2.5v, or 3.3v. 9 in2+ positive serial data input 2, cml 10 in2- negative serial data input 2, cml 13, 24 gnd supply ground 14, 17 vcc1out supply voltage for cml output out1. connect to 1.8v, 2.5v, or 3.3v. 15 out1- negative serial data output 1, cml 16 out1+ positive serial data output 1, cml 18 eno1 output 1 enable, lvcmos input. see table 1. 19 eno2 output 2 enable, lvcmos input. see table 1. 20, 23 vcc2out supply voltage for cml output out2. connect to 1.8v, 2.5v, or 3.3v. 21 out2- negative serial data output 2, cml 22 out2+ positive serial data output 2, cml ep exposed pad ground. the exposed pad must be soldered to the circuit board ground for proper thermal and electrical performance. detailed description the MAX3841 contains a pair of cml inputs that drive two 2:1 multiplexers, with separate select inputs sel1 and sel2, providing a 2 2 crosspoint data path. the outputs of the multiplexers each drive a high-perfor- mance cml output that can be disabled (powered down) using the eno1/eno2 inputs. all of the data paths are fully differential to minimize jitter, crosstalk, and signal skew. see figure 1 for the functional diagram. cml input and output buffers the MAX3841 input and output buffers are terminated with 50 ? to independent supply lines, and are also com- patible with 100 ? differential terminations. (see figures 3 and 4.) separate power-supply connections are provided for the core, input buffers, and output buffers to allow dc- coupling to 1.8v, 2.5v, or 3.3v cml ics. if desired, the cml inputs and outputs can be ac-coupled. the cml inputs accept serial nrz data with differential amplitude from 150mv p-p to 1200mv p-p (see figure 2). the cml outputs provide 500mv p-p nominal differential swing, resulting in low power consumption. MAX3841 cml cml cml cml 1 0 1 0 out1 eno1 sel1 out2 eno2 sel2 in1 in2 2 2 2 2 figure 1. functional diagram
applications information select and enable controls the MAX3841 provides two lvcmos-compatible select inputs, sel1 and sel2. either data input can be connected to either or both data outputs. the MAX3841 provides two lvcmos-compatible enable inputs, eno1 and eno2, so each output can be disabled independently. the MAX3841 can also be used as a 1:2 driver, 2:1 multiplexer, or a dual 1:1 buffer by using the lvcmos control inputs accordingly (see table 1). power-supply connections each of the input and output power-supply connections (vcc1in, vcc2in, vcc1out, vcc2out) is indepen- dent and need not be connected to the same voltage. the input and output supplies can be connected to 1.8v, 2.5v, or 3.3v, but the core supply (v cc ) must be connected to 3.3v for proper operation. input and output interfaces the MAX3841 inputs and outputs can be ac-coupled or dc-coupled according to the application. if an input or output is not used it should be terminated with 50 ? to the correct input or output supply voltage. for more information about interfacing with logic families, refer to maxim application note hfan-01.0: introduction to lvds, pecl, and cml . package and layout considerations the MAX3841 is packaged in a 4mm 4mm 24-pin thin qfn with exposed pad. the exposed pad provides thermal and electrical connectivity to the ic and must be soldered to a high-frequency ground plane. use multiple vias to connect the exposed pad underneath the package to the pc board ground plane. use good layout techniques for the 10gbps pc board transmission lines, and configure the layout near the ic to minimize impedance discontinuities. power-supply decoupling capacitors should be located as close as possible to the ic. MAX3841 12.5gbps cml 2 2 crosspoint switch _______________________________________________________________________________________ 5 v- v+ (v+) - (v-) 1200mv max 600mv max 75mv min 150mv min figure 2. definition of differential voltage swing MAX3841 50 ? 50 ? vcc_in in_+ in_- MAX3841 50 ? 50 ? vcc_out out_+ out_- figure 3. equivalent cml input circuit figure 4. equivalent cml output circuit table 1. output controls eno1 eno2 sel1 sel2 out1 out2 0000 in2 in1 0001 in2 in2 0010 in1 in1 0011 in1 in2 1 1 x x disabled disabled
MAX3841 12.5gbps cml 2 2 crosspoint switch 6 _______________________________________________________________________________________ chip information transistor count: 950 process: sige bicmos 1 v cc 2 vcc1in 3 in1+ 4 in1- 5 vcc1in 6 sel1 7 sel2 8 vcc2in 9 in2+ 10 in2- 11 vcc2in 12 v cc 13 gnd 14 vcc1out 15 out1- 16 out1+ 17 vcc1out 18 eno1 19 eno2 20 vcc2out 21 out2- 22 out2+ 23 vcc2out 24 gnd MAX3841 thin qfn* *the exposed pad of the qfn package must be soldered to ground for proper thermal and electrical operation. top view pin configuration
package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) 24l qfn thin.eps 21-0139 a package outline 12,16,20,24l qfn thin, 4x4x0.8 mm MAX3841 12.5gbps cml 2 2 crosspoint switch _______________________________________________________________________________________ 7
MAX3841 12.5gbps cml 2 2 crosspoint switch maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2003 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) a 21-0139 package outline 12,16,20,24l qfn thin, 4x4x0.8 mm
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